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 SSM9926O
N-CHANNEL ENHANCEMENT MODE POWER MOSFET
A
PRODUCT SUMMARY
D1 D2
Low on-resistance Capable of 2.5V gate drive Low drive current Surface mount package
G1 S1 G2 S2
DESCRIPTION
The Advanced Power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness.
BVDSS RDS(ON) ID
8
G2 S2 D2 S2
20V 28m 4.6A
Pb-free; RoHS-compliant
TSSOP-8
D1
S1
G1 S1
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current
1 3 3
Rating 20 4.6 3.7 20 1 0.008 -55 to 150 -55 to 150
Units V V A A A W W/
Continuous Drain Current Total Power Dissipation Linear Derating Factor
Storage Temperature Range Operating Junction Temperature Range
THERMAL DATA T
Symbol Rthj-a Parameter Thermal Resistance Junction-ambient
3
Value Max. 125
Unit /W
03/11/2007 Rev.1.00
www.SiliconStandard.com
1
SSM9926O
A
ELECTRICAL CHARACTERISTICS@Tj=25oC(unless otherwise specified)
Symbol BVDSS
BVDSS/Tj
Parameter Drain-Source Breakdown Voltage
2
Test Conditions VGS=0V, ID=250uA
Min. 20 0.5 -
Typ. 0.1 23 9.7 12.5 1 6.5 7 14.5 19 12 355 190 85
Max. Units 28 40 1 25 100 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA
RDS(ON)
Static Drain-Source On-Resistance
VGS=4.5V, ID=4A VGS=2.5V, ID=2A
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C)
o o
VDS=VGS, ID=250uA VDS=10V, ID=4.6A VDS=20V, VGS=0V VDS=20V ,VGS=0V VGS= 8V ID=4.6A VDS=20V VGS=5V VDS=10V ID=1A RG=3.3,VGS=5V RD=10 VGS=0V VDS=20V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
SOURCE-DRAIN DIODE
Symbol IS VSD Parameter
Continuous Source Current ( Body Diode )
Test Conditions VD=VG=0V,VS=1.2V Tj=25,IS=1.25A,VGS=0V
Min. -
Typ. -
Max. Units 0.83 1.2 A V
Forward On Voltage
2
Notes:
1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 208/W when mounted on Min. copper pad.
03/11/2007 Rev.1.00
www.SiliconStandard.com
2
SSM9926O
25
25
20
4.5V 4.0V 3.5V 3.0V ID , Drain Current (A)
20
4.5V 4.0V 3.5V 3.0V
ID , Drain Current (A)
15
2.5V
15
2.5V
10
10
V GS =2.0V
5
5
V GS =2.0V T C =25 o C
T C =150 o C
0 3 0 0.5 1 1.5 2 2.5 3
0 0 0.5 1 1.5 2 2.5
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
45
1.8
I D = 4A T C =25 o C
40
I D = 4A
1.6
V GS =4.5V
RDS(ON) (m )
35
Normalized R DS(ON)
1.4
1.2
30
1.0
25
0.8
20 1 2 3 4 5 6
0.6 -50 0 50 100 150
V GS (V)
T j , Junction Temperature ( C)
o
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
03/11/2007 Rev.1.00
www.SiliconStandard.com
3
A
SSM9926O
6
1.2
5
1
ID , Drain Current (A)
4
0.8
PD (W)
25 50 75 100 125 150
3
0.6
2
0.4
1
0.2
0
0 0 50 100 150
T c , Case Temperature ( C)
o
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current v.s.
Fig 6. Typical Power Dissipation
Case Temperature
100
1
Duty Factor = 0.5
10
100us 1ms
Normalized Thermal Response (R thja)
0.2
0.1
0.1
0.05
ID (A)
1
10ms 100ms
0.02
0.01
PDM
0.01
Single Pulse
t T
0.1
1s T C =25 o C Single Pulse
0.01
Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=208 oC/W
DC
0.001
0.1
1
10
100
0.0001
0.001
0.01
0.1
1
10
100
V DS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
03/11/2007 Rev.1.00
www.SiliconStandard.com
4
SSM9926O
12
1000
f=1.0MHz
I D =4.6A
10
VGS , Gate to Source Voltage (V)
V DS =10V
8
Ciss
V DS =15V V DS =20V C (pF) Coss
100
6
Crss
4
2
0 0 5 10 15 20 25
10 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
1.6
1.4
10
T j =150 o C VGS(th) (V) T j =25 o C
1.2
1
IS (A)
1
0.8
0.6 0.1
0.4
0.01 0 0.4 0.8 1.2 1.6
0.2 -50 0 50 100 150
Junction Temperature ( o C )
V SD (V)
Fig 11. Forward Characteristic of
Reverse Diode
Fig 12. Gate Threshold Voltage v.s. Junction Temperature
03/11/2007 Rev.1.00
www.SiliconStandard.com
5
SSM9926O
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE 0.5x RATED VDS
RG
G
+ 5v -
S VGS
10% VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG 5V
D
G S
+
RATED VDS
QGS
QGD
VGS
1~ 3 mA
IG ID
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
03/11/2007 Rev.1.00
www.SiliconStandard.com
6


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